If Part 1 of this series established that the United States is not short of PV manufacturing capacity announcements, the second article asks a narrower and more useful question: where in the chain does that capacity exist, and where are the gaps? The answer is a domestic supply chain that gets stronger the closer it sits to the end customer and less established the further upstream you look. 
Module assembly is, by a wide margin, the most mature segment of the US domestic supply chain. PV Tech Research estimates US module capacity at 77.3GW (including thin film) and 61GW on a crystalline-only basis, with production reaching 51.5GW and 37.5GW, respectively. Current capacity is sufficient to meet total domestic module demand. For developers sourcing modules today, the “Made in USA” question is largely resolved. The critical question now is the supply chain feeding those modules. 
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Cell capacity tells a different story. Including First Solar’s thin-film lines, US cell capacity stands at 26.5GW against 19GW of production; on a crystalline-only basis, capacity drops to just 10GW with production at 5.2GW. Set against a module capacity of 61-77 GW, the mismatch is stark: even at full utilisation, domestic cell production covers only one-third to just over 40% of what domestic module lines can assemble. In practice, the module industry’s primary input, the cell itself, remains substantially import-dependent and will stay that way until cell capacity under construction (see Day 1’s 55.9GW pipeline figure) converts into shipped product. 
The wafer stage reveals the greatest imbalance. US wafer capacity is just 5GW, against production of 3.2GW, which currently covers less than 63% of the crystalline-only cell segment it feeds, and utilises only 20% of the polysilicon capacity sitting above it. More importantly, it will be insufficient to support the more than 40GW of additional cell capacity coming online in the next 18 months. The practical consequence is one of the more counterintuitive facts in the domestic supply chain today: with wafer capacity this constrained, a US-produced polysilicon ingot often must be shipped abroad to be sliced into wafers, then returned to the country for processing into a cell. Domestic wafering capacity, not domestic polysilicon or cell capacity, is the tightest bottleneck in the chain, and it is the stage that has attracted the least investment relative to the gap it needs to close. 
Polysilicon sits at the top of the chain and has drawn some of the most significant capital commitments in the sector, with 36GW of capacity against 15.5GW of PV-allocated production. As covered in Day 1 of the series, part of that gap reflects capacity shared with semiconductor-grade output rather than genuine idle capacity, but even accounting for that, the shortfall relative to downstream demand remains substantial. Polysilicon is the one segment where the investment case is clearly being made; the question is whether it converts into PV-allocated tonnage fast enough to fill the gap. 
For manufacturers, the picture is one of uneven opportunity. Module producers are operating in a market that is close to domestic saturation, while cell and, especially, wafer producers are sitting on some of the least-contested capacity gaps in the industry. For equipment suppliers, the wafer and cell stages represent the clearest near-term demand signal, since this is where the largest build-out is still needed to match existing downstream capacity.  
For developers, the import dependency at the cell and wafer stages means full supply-chain traceability, and FEOC compliance in particular, will remain challenging to guarantee for several more years, regardless of how domestic the final module assembly is. For investors, the wafer stage in particular looks underpriced relative to its strategic importance: it is the smallest segment in absolute capacity terms, the most exposed to offshore round-tripping. 
The investment pattern raises a question: if domesticating the entire value chain is the policy priority, why does most of the capital under construction still sit at the cell and module stages rather than upstream, where the gaps identified above are largest? Should the policy go further to incentivise build-out specifically targeted at these gaps?  
Section 232’s polysilicon investigation and the broader push toward domestic content suggest intent, but the signal is muddied by the accelerated phasing out of the 45Y production tax credit and the 48E investment tax credit, both of which had underpinned deployment-side economics for renewables more broadly. Removing that in December 2027 raises legitimate questions about how committed policymakers are to the deployment side of the equation, even as they tighten the screws on component sourcing. 
What has survived, and what matters most for the manufacturers this series is focused on, is the 45X manufacturing production credit, which remains intact. Section 232 reinforces it directly through the Minimum Import Price, which will function as a price floor across solar components and insulate domestic producers from the kind of import-driven price collapse that has undercut manufacturing investment in the past. Taken together, this is not a coherent industrial strategy so much as a set of overlapping instruments that happen to favour manufacturers even as they leave deployment economics more uncertain. But for the manufacturers themselves, particularly at the cell and wafer stages, where competition has been most directly curtailed, the opportunity to scale into a protected, still-underbuilt market is real. 
The next article in this series will map the capital commitments behind this build-out: which segments are attracting investment, where the money is coming from and whether the announced capacity additions are sufficient to close the gaps identified here. The opportunity is real, but execution will determine whether domestic manufacturing scales fast enough to meet both policy ambitions and market demand. 
Many of the subjects explored in this article will be under further discussion at our PV CellTech USA conference in San Francisco on 13-14 October. For details and booking, click here.
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