Thank you for visiting nature.com. You are using a browser version with limited support for CSS. To obtain the best experience, we recommend you use a more up to date browser (or turn off compatibility mode in Internet Explorer). In the meantime, to ensure continued support, we are displaying the site without styles and JavaScript.
Advertisement
Scientific Reports volume 15, Article number: 16926 (2025) Cite this article
1613 Accesses
Metrics details
Building-attached photovoltaic (BAPV) systems integrate photovoltaic (PV) technology with buildings, attracting increasing attention as a promising solution to advancing eco-friendly objectives. In BAPV systems, wireless power transfer (WPT) technology offers unique advantages; however, existing research faces challenges in effectively balancing cost, efficiency, and flexibility. This paper presents a distributed WPT system based on secondary-side-direct-series (SSDS) topology. The proposed system inherits the high flexibility of conventional distributed WPT systems, while removing the secondary rectifiers within each module, noticeably reducing cost and size compared to conventional distributed WPT systems. Furthermore, this paper presents a planar and integrated design for the power and detection coils, reducing volume, improving consistency and synchronization accuracy, and utilizing PCB litz wire in the power coil to enhance efficiency. In addition, this paper proposes a synchronization strategy based on detection coil, ensuring the stability and safety of the proposed SSDS distributed WPT system. The proposed system is validated through simulations, and an 850 W prototype system is developed for experimental verification, achieving an efficiency of over 85%.
The extensive use of fossil fuels has resulted in severe environmental challenges and the development of renewable energy has garnered increasing attention¹. Among various renewable energy sources, photovoltaic (PV) power generation, owing to its availability, low cost, and cleanliness, has been widely adopted in various fields^2,3. Over the past decade, numerous breakthroughs and innovations in the PV field have continually emerged, establishing photovoltaic power generation as one of the most promising renewable energy sources^4,5,6.
Building-attached photovoltaic (BAPV) generation is widely utilized in urban areas^7,8. In such systems, PV panels are typically mounted on the exterior surfaces of a building’s envelope, requiring wired electrical connections between the PV panels and the building’s interior⁹. However, wires in BAPV systems are often exposed to harsh environmental conditions such as UV radiation, high temperatures, moisture, and mechanical stress. Over time, these factors can degrade the insulation, resulting in potential electrical faults, short circuits, or safety hazards. Therefore, eliminating the need for wires in BAPV systems or adequately protecting the wiring from environmental exposure is crucial. In this context, wireless power transfer (WPT) emerges as an ideal solution for BAPV systems.
As a contactless energy transfer technology, WPT has been applied in various fields, including consumer electronics, electric vehicles, and medical devices^10,11. By integrating WPT technology into BAPV systems, the energy generated by PV panels can be wirelessly transferred through the building envelope, eliminating the need for physical perforations and wiring, enhancing the indoor environment and extending the system’s lifespan. Moreover, WPT improves overall system safety due to its non-contact operation¹² and offers a convenient plug-and-play installation method¹³.
The incorporation of WPT into PV systems has been explored in previous studies^{14,15,16,17,18,19,20,21,22,23}. In¹⁴, PV cells are used as the power source, and WPT is applied to achieve an underwater power supply. In¹⁵, PV energy is transmitted through WPT coils after DC/AC conversion by a micro-inverter, then rectified and regulated via a BUCK converter to charge the battery. In¹⁶, a PV-based wireless charging system for a lunar rover is proposed, with a BUCK converter on the secondary side to achieve maximum power point tracking (MPPT). In¹⁷, a PV-based wireless charging system for electric vehicles is described. In¹⁸, a DC microgrid-based connection architecture for wireless electric vehicle charging applications is proposed, along with a collaborative control strategy for PV systems, energy storage systems, and DC microgrids, enabling stable power transfer for wireless electric vehicle charging. In¹⁹, a hybrid compensation-based efficient wireless charging system with a solar photovoltaic interface is proposed. In²⁰, a modular photovoltaic system equipped with a capacitive power transfer interface is proposed. In²¹, WPT is integrated with a modular PV system, using two MPPT strategies that work collaboratively to enable the system to adapt to various operating conditions and environments.
However, existing research faces challenges in effectively balancing cost, efficiency, and flexibility, which are critical for BAPV applications.
Based on system connectivity, existing solutions can be categorized into centralized WPT topology and distributed WPT topology.
The centralized WPT topology has been applied in^17,18,19. For applications with fixed power levels and operating circumstances, such systems offer benefits like simplified design, reduced manufacturing costs, and high peak efficiency. However, in BAPV applications, centralized WPT systems encounter difficulties in maintaining peak efficiency under significant variations in operating conditions and lack the required flexibility.
The distributed WPT topology has been investigated in^20,21. This topology facilitates modular design and offers enhanced flexibility, allowing dynamic adjustment in component quantities to adapt to various operating conditions and environments. However, it may lead to increased device costs and a slight reduction in peak efficiency, which are disadvantageous for BAPV applications.
The configuration of coils is another crucial factor for BAPV applications, as it needs to be compact and resistant to harsh environmental conditions. PCB planar coils are advantageous for modular WPT systems due to their ease of manufacture, high repeatability, and low profile²⁴. Nevertheless, for the BAPV application, conventional PCB planar coils exhibit significant high-frequency loss²⁵ and fail to meet the efficiency requirements. To address the high loss issue, one potential solution is to introduce PCB litz wire. By arranging the strands in a twisting pattern within a PCB winding, a litz-wire-like effect is achieved, facilitating improved current distribution across the winding and reducing coil loss at specific frequency ranges^26,27,28,29.
Considering the limitations in existing research, this paper introduces a distributed WPT system based on secondary-side-direct-series (SSDS) topology for building-attached photovoltaic generation systems, as illustrated in Fig. 1. Figure 1a illustrates the installation method of the PV panels and the WPT modules. The primary side of the WPT module is integrated with the PV panel and installed on the exterior of the building envelope, while the secondary side is installed on the interior and directly connected in series. Figure 1b illustrates the circuit topology of the system.
The main contributions of the paper are as follows:
A modular distributed WPT structure for building-attached photovoltaic generation systems is proposed. This system adopts an SSDS topology with a CLC-S compensation network, maintaining the flexibility and modularity of conventional distributed WPT topologies while eliminating rectifiers within each module.
A PCB planar power coil integrated with a detection coil is proposed. The planar coil reduces volume and enhances the parameter consistency of the modules, and the utilization of PCB litz wire further improves the efficiency. The detection coil is used to synchronize with the current from the secondary side. A mortise-and-tenon structure is employed to securely fasten the primary coil and the detection coil, ensuring precise detection of the secondary current.
A synchronization scheme based on the detection coil is presented. Since the secondary sides of the modules are directly connected in series before rectification, the primary-side inverters of each module must be synchronized. By implementing the proposed synchronization strategy, the system achieves high-performance synchronization between modules, ensuring stability and safety.
Proposed SSDS distributed WPT system. (a) System installation diagram. (b) System topology diagram.
As a distributed WPT system, the proposed system offers greater flexibility compared to centralized WPT systems. Its planar and modular design further enhances the ease of manufacturing, assembly, and scalability, making it adaptable to various environments and power levels in BAPV applications.
Additionally, compared to conventional distributed WPT systems, the proposed system eliminates the secondary rectifier within each module, significantly reducing system cost and volume. This cost advantage becomes even more pronounced in large-scale production, leading to substantial system savings. Moreover, the use of PCB litz wire improves system efficiency, making the proposed system more efficient than conventional distributed WPT systems.
However, the control scheme of the proposed system is more complex than that of conventional distributed WPT systems. Nevertheless, thanks to an innovative synchronization strategy and well-designed hardware and software optimizations, the system demonstrates strong resistance to interference, high stability, and good controllability.
In summary, the proposed system achieves a balance among cost, efficiency, and flexibility, which are crucial factors for BAPV applications, while ensuring system stability and controllability.
This paper is organized into the following chapters. Chapter “Distributed WPT system based on SSDS topology” analyzes the implementation principles and system characteristics of the proposed distributed WPT system. Chapter “Coil design and synchronization strategy” describes the design of coils and synchronization strategy, as well as the process and results of parameter optimization and simulation analysis. Chapter “Experimental verification” presents the experimental validation of the proposed topology and system.
WPT is a highly advantageous solution for BAPV systems, but existing WPT topologies face challenges in balancing cost, efficiency, and flexibility. Compared to existing WPT topologies, SSDS topology eliminates the rectifiers on the secondary side within each module, directly connecting the secondary coils and compensation networks of each module in series, significantly reducing costs and volume, presenting a highly promising solution for BAPV systems.
The compensation network plays a critical role in SSDS topology. Since the secondary sides of all modules are directly connected in series, the output of each module should exhibit voltage-source characteristics. Additionally, to minimize power losses and improve system efficiency, the inverter output should feature a zero-phase-angle (ZPA) characteristic. Among compensation networks that meet these requirements, the CLC-S compensation network is an ideal solution due to its simple structure and minimal number of resonant components. This section provides a detailed analysis about characteristics of the system.
The proposed distributed WPT system based on SSDS topology is shown in Fig. 1(b). Each WPT module consists of an inverter, primary and secondary coils, and primary and secondary compensation networks. In this configuration, L_p and L_s represents the inductance of the primary and secondary coils, respectively, while M_ps denotes the mutual inductance between primary and secondary sides. The CLC-S compensation network consists of C_f, L_f, C_p, and C_s. Additionally, C_L and R_L represent the filter capacitor and the load resistance, respectively.
Equivalent simplification process of the single-module system. (a) Single-module system. (b) First-order harmonic decoupled equivalent circuit. (c) C_p is divided into two capacitors. (d) Equivalent circuit consisting of two T resonant circuits. (e) Norton equivalent circuit. (f) Thevenin equivalent circuit.
The circuit of a module is shown in Fig. 2a, where V_in, I_in, V_o, I_o, and I_p are the phasor forms of the fundamental component of the inverter output voltage v_in, the inverter output current i_in, the module’s output voltage v_o, the module’s secondary output current i_o, and the primary coil current i_p, respectively, and the PV panel is represented as a DC voltage source V_dc. To simplify the analysis further, the coupling coils are represented using a T-model, and the rectifier is replaced by an equivalent resistor R_e, as shown in Fig. 2b.
The compensation network parameters are designed by the following equations:
where ω = 2πf_s is the angular resonant frequency.
To facilitate analysis, the capacitor C_p is divided into two capacitors, C_p1 and C_p2, as presented in Fig. 2c:
Based on (1) and (2), an equivalent circuit consisting of two T resonant circuits is obtained, as depicted in Fig. 2d. A detailed analysis of the T resonant circuit is provided in³⁰ and the input impedance Z_i2, and current I_in can be calculated:
Equivalent circuit of the multi-module system.
It is evident that the input impedance of the compensation network is purely resistive, indicating that V_in and I_in are in phase, thus enabling the inverter to achieve ZPA.
The analysis of the output characteristics involves both a Norton equivalent approach and a Thevenin equivalent approach. Since Z_o1 is infinite, the circuit shown in Fig. 2d can be simplified to the circuit in Fig. 2e using the Norton equivalent, where the Norton equivalent current source
Equation (4) also indicates that the system has the characteristic of a constant current of primary coil. Furthermore, since Z_o2 = 0, the circuit in Fig. 2(f) can be obtained using the Thevenin equivalent, where the Thevenin equivalent voltage source
Finally, it can be obtained that
From (6), it can be concluded that the module exhibits the output characteristics of a voltage source.
The equivalent circuit of SSDS topology with N modules is presented in Fig. 3 and the numbers in the variable subscripts correspond to their respective module numbers. Considering Module #1, the remaining modules are simplified into (N–1) equivalent voltage sources connected in series, as illustrated in Fig. 4a. These equivalent voltage sources in series can be represented as:
From Fig. 4a, it can be observed that I_in1 is the sum of the current generated by the source V_in1 and V_T(all). When considering V_in1 alone, as shown in Fig. 4b, V_T(all) is treated as a short circuit and I_in1 is given by:
When considering V_T(all) alone, as shown in Fig. 4c, V_in1 is short-circuited. In the left-side circuit, –jwL_f and jwL_f form a parallel resonance tank, resulting in neither current flow nor voltage drop at the dashed-line section. In the right-side circuit, a series resonance occurs, and it can be readily deduced that:
When combing the source V_in1 and V_T(all) and referencing (8) and (9), the input current of Module #1 is:
Application of the superposition theorem for calculation of I_in1. (a) Considering V_in1 and V_T(all) together. (b) Considering V_in1 alone. (c) Considering V_T(all) alone.
From (10), it can be observed that the SSDS topology introduces a coupled characteristic between the modules within the system. The impact of this coupling characteristic on system efficiency will be analyzed in following sections.
As previously discussed, the output of each module exhibits the characteristics of a voltage source. This characteristic remains consistent when multiple modules are connected in series, leading to the following result:
In a practical system, the parasitic resistances in the resonant inductors, primary coils, secondary coils, and series-connected lines must be considered, denoted as R_Lf, R_p, R_s, and R_line. When considering only V_in1, the practical circuit model is depicted in Fig. 5, and I_o and I_in1 can be obtained as
The practical circuit model when considering only V_in1.
where V_T represents the Thevenin equivalent voltage source at the output port of Module #1, expressed as
By calculating the shunt current of I_o(Vin1), the input currents of other modules, considering only V_in1, can also be determined as:
where
System efficiency under different load resistance and number of modules.
Considering the combined effect of all voltage sources, from (12) to (15), the input currents of each module and the total output current can be determined as
where
For simplicity, (16) is derived under the assumption that all voltage sources have equal voltages, where
From (16), the total input power and total output power of the system can be derived as:
where φ_in represents the phase difference between V_in and I_in.
Finally, the efficiency can be calculated as
Figure 6 illustrates the variation in system efficiency as the load and the number of modules change. Table 1 lists the system parameters used in the calculation of system efficiency.
According to the results presented in Fig. 6, under most load conditions, system efficiency first increases and then decreases as the number of modules increases. This indicates that, for different load conditions, there is an optimal number of modules that maximizes system efficiency.
It can also be calculated that, under the scenario of constant power transmission per module, the system’s AC–AC efficiency remains nearly constant due to the coupled nature between modules. This constant efficiency characteristic provides systems employing the SSDS topology with extremely high scalability.
In the proposed distributed WPT system based on the SSDS topology, achieving accurate synchronization between modules is a critical challenge.
To address this, the system employs a detection coil to sense the secondary-side current while effectively decoupling it from the primary-side current. Uniform coil parameters across all modules are required, and the detection coil must be precisely designed to ensure decoupling from the primary coil. To meet these requirements, PCB planar coils are selected for their superior consistency, compactness, and manufacturing precision compared to conventional wound coils. Thus, a planar design is adopted for both the power and detection coils, with a mortise-and-tenon structure integrated to achieve precise decoupling.
DD coil and magnetic core configuration. (a)DD coil. (b)Magnetic core configuration.
Magnetic field distribution of the coils.
The power coils are designed in a DD structure, as shown in Fig. 7a, where l_pc, w_pc, w_r, d_r, N_pc and N_l are the length, width of the power coil, routing width, routing clearance, the number of turns in the power coil and the number of layers in the PCB, respectively. A magnetic core is symmetrically positioned adjacent to the coils, as depicted in Fig. 7b.
The airgap is set at 50 mm. Considering the transmission distance requirements, l_pc and w_pc are set at 250 mm, N_pc is set at 20, w_r is set at 3 mm, and d_r is set at 2 mm. An 8-layer PCB is used, with a copper thickness of 2oz.
Further analysis of the magnetic field generated by the power coil has been conducted, and the finite element simulation results are presented in Fig. 8. According to the results presented in Fig. 8, the symmetric coil design and magnetic core configuration ensure that the magnetic field generated by the primary coil is symmetrically distributed on both the upper and bottom sides. This characteristic is crucial for the placement of detection coils and the implementation of the synchronization strategy.
Due to the significant high-frequency loss in conventional PCB planar coils, the use of PCB litz wire is essential. Figure 9 shows a segment of PCB litz wire at the bundle level. In the design of the PCB litz wire, several critical parameters must be carefully considered, including the number of strands per layer N_s, routing width per strand w_s, routing width per bundle w_b, routing clearance between each strand d_s, and routing angle A_s, with trade-offs to optimize performance.
Schematic diagram of PCB litz wire.
To maximize the use of routing space, given current manufacturing capabilities, d_s is set to 0.15 mm. w_b is set to 3 mm to maintain consistency with w_r. N_s, w_s, and A_s are three remaining parameters, with effectively two degrees of freedom left. Furthermore, N_s and A_s are set to different values to conduct finite element analysis, with PCB solid wire for comparison. The analyzing results of normalized resistance are presented in Fig. 10.
Finite element simulation results of the PCB litz wire. (a) Normalized resistance at different frequencies. Normalization refers to the process of dividing the actual unit length resistance of the PCB litz wire by the unit length DC resistance of a solid PCB wire. AFR means the advantageous frequency range of PCB litz wire. (b) Current density distribution of the PCB litz wire with N_s = 5 and A_s = 30^o at 85 kHz. (c) Current density distribution of the PCB solid wire at 85 kHz.
It can be observed that, using PCB litz wire effectively achieves an even distribution of current density, and reduces resistance and loss within a certain frequency range. At system operating frequency f_s = 85 kHz, with N_s = 5 and A_s = 30^o, PCB litz wire exhibits significant advantages. These parameters are used for experimental validation in subsequent studies.
The detection coil is designed as two series-connected sub-coils arranged in the same polarity, and orthogonally mounted onto the primary coil using a mortise-and-tenon structure, as illustrated in Fig. 11a, where l_dc and h_dc represent the length and height of the detection coil, B_p and B_s represent the magnetic fields generated by the primary and secondary coils. l_dc is kept consistent with l_pc, and h_dc is fixed at 15 mm, with the number of turns N_dc configured to 4, comprising 2 turns on the upper-side and 2 turns on the bottom-side.
Figure 11b presents the equivalent circuit of the power coils and the detection coil, where the subscripts p, s, d1, and d2 represent the primary coil, secondary coil, upper-side sub-coil of detection coil, and bottom-side sub-coil of detection coil, respectively. The detection coil is considered as consisting of two separate sub-coils connected in series. Since the two sub-coils are symmetrically mounted on the upper and bottom sides of the primary coil, the magnetic field generated by the primary coil current is equal in magnitude but opposite in direction within the upper-side and bottom-side sub-coils in ideal condition, which means M_pd1 + M_pd2 ≈ 0. Furthermore, the detection coil can be considered as a whole, leading to a simplified equivalent circuit diagram, as shown in Fig. 11(c), where the subscript d represents the whole detection coil, and
Since M_pd ≈ 0, the decoupling between the detection coil and the primary coil can be ensured, and the integrated design based on mortise-and-tenon structure further ensures precise decoupling between the detection coil and the primary current. On this basis, the induced voltage of the detection coil is given by
Power coils and detection coil. (a) Schematic diagram. (b) Equivalent circuit. (c) Simplified equivalent circuit.
where V_ind is the phasor form of the induced voltage of the detection coil v_ind, M_sd is the mutual inductance between the secondary coil and the detection coil.
The complete parameters for the power coils and detection coil are shown in Table 2.
Based on the determined parameters, finite element analysis is conducted, with the results presented in Table 3, where the letter L represents self-inductance, M represents mutual inductance, and k represents the coupling coefficient, the subscripts p, s, and d refer to the primary coil, secondary coil, and detection coil, respectively.
As shown in Table 3, the coupling coefficient between the detection coil and the primary coil is close to 0, achieving the intended decoupling objective. The planar and integrated design further ensures that the manufactured coils achieve precise decoupling.
Synchronization strategy. (a) Synchronization scheme diagram. (b) Waveforms of synchronization process.
This paper proposes a synchronization strategy based on detection coil, as depicted in Fig. 12, taking Module #1 as an example and the subscript “1” in the variable symbols denotes Module #1.
When the detection coil is decoupled from the primary coil, the induced voltage v_ind1 on the detection coil of Module #1 is determined by (22), with its phase leading the secondary current i_o by 90 degrees.
The induced voltage v_ind1 is filtered and used as a reference for synchronization. A micro controller unit (MCU) on the primary side controls the inverter and calculates the phase difference between the carrier signal v_c1 and v_ind1, which is denoted as Δφ₁.
Thus, v_c1 is aligned with v_ind1 by inserting a transition interval, as presented in Fig. 12b. The period of a transition interval is given by:
Since v_in1 leads v_c1 by 90 degrees, by aligning v_c1 with v_ind1, a 180^o phase difference between v_in1 and i_o can be ensured. When all modules have completed the above process, the output voltages of all primary inverters (v_in1, v_in2, …, v_inN) maintain a 180^o phase difference with the common secondary current i_o and synchronization between modules is achieved. Moreover, as derived from (6), the output voltages of all modules (v_o1, v_o2, …, v_oN) are now in phase with i_o, reflecting a unit power factor characteristic at the output port of each module.
To ensure that the synchronization is sufficiently robust against external interference, targeted designs have been implemented both in hardware and software. On the hardware side, the synchronization circuit is equipped with filtering circuits and Schmitt triggers to effectively suppress noise, spikes, and other disturbances at non-target frequencies. On the software side, the MCU continuously calculates the phase difference and applies algorithms for noise reduction. Therefore, the synchronization is robust enough to withstand external interference.
However, in practical systems, due to the presence of detection error and output error, synchronization error between modules is inevitable. Considering the initial secondary current I_o(m) of the m-th synchronization cycle, its phase is set as the reference phase:
where subscript “m” means the m-th synchronization cycle.
The detection error refers to the error introduced during the detection stage, caused by the incomplete decoupling between the detection coil and the primary coil. As a result, in the m-th synchronization cycle, before synchronization, the expression for V_ind1 should be corrected as
where V_ind1(m) represents the RMS value of v_ind1 under ideal conditions, 90° represents the ideal phase difference between v_ind1 and i_o. K_de1(m) and φ_de1(m) denotes the amplitude gain and phase shift of v_ind1 caused by the detection error, respectively.
The phase shift of v_ind1 affects the synchronization process and leads to a phase shift in the inverter output voltage v_in1. The expression for V_in1 should be corrected as
where V_in1 presents the RMS value of v_in1, and 180° represents the ideal phase difference between v_in1 and i_o.
Calculated results of synchronization error.
The output error refers to the error generated during the power transmission process, caused by factors such as component parameter deviations and parasitic parameter effects. The output error results in deviations in the gain and phase difference between v_o1 and v_in1, which no longer satisfy the conclusion in (6). Therefore, in the m-th synchronization cycle, V_o1 can be expressed as
where K_oe1(m) and φ_oe1(m) denotes the amplitude gain and phase shift of v_o1 caused by the output error, respectively.
Based on the above steps, in the m-th synchronization cycle, the output voltage of each module (V_o1(m), V_o2(m), …, V_oN(m)) can be calculated. Furthermore, the initial secondary current of the (m + 1)-th synchronization cycle can be determined as
The mutual inductance values between the power coil and the detection coil used in the calculation are listed in Table 4, while K_oe and φ_oe are obtained by generating random numbers within a specific range during each synchronization cycle.
Calculated results of the variation curves of system efficiency and loss with changes in L_f.
By repeatedly performing the above calculation, the inverter output voltage of each module at any synchronization cycle can be recursively derived, and the phase differences between them can be obtained. The time difference corresponding to the maximum phase difference is the maximum synchronization error T_mse between the modules.
Figure 13 presents the synchronization error calculated for a three-module system using the above method. The maximum synchronization error T_mse = 164 ns = 1.38%T_s, where T_s is the switching period. It can be observed that the synchronization error is effectively minimized, ensuring the stable operation of the system.
Based on the coil parameters in Table 3, C_s can be calculated, while C_f, L_f, and C_p still contain one degree of freedom. For a system employing three modules in series, the rated power of a single module is set at 300 W. Referring to the previous analysis of the efficiency of the practical system, the variation curves of system efficiency and loss with changes in L_f can be calculated, as illustrated in Fig. 14.
Given the results illustrated in Fig. 14, L_f is set to 15 µH. Consequently, C_f and C_p are also determined, as shown in Table 5.
A model is built in Simulink/Matlab to simulate the performance of the proposed topology and system, with circuit parameter variations and parasitic effects being considered. The model applies the proposed SSDS topology and the synchronization is performed every 50 switching periods.
Simulation verification of the synchronization strategy. (a) The entire system’s operation process. (b) Waveforms of synchronization. (c) Waveforms of synchronization (further enlarged).
First, the entire system’s operation process is simulated, with modules #1, #2, and #3 soft-starting at 0s, 0.05s, and 0.1s, respectively. The simulation results are shown in Fig. 15a, where i_o is the secondary current, v_in1, v_in2, v_in3 are inverter output voltages and V_L is the voltage across the load resistor.
As shown in Fig. 15a, the module startup does not lead to severe power fluctuations, facilitating smooth connection and disconnection of modules in a multi-module system. Moreover, since synchronization is achieved by inserting a transition interval, the synchronization does not introduce a significant transient process, thereby ensuring the stability of the system.
Configuration of the experimental setup. (a) Overall experimental setup of the prototype system. (b) Overall configuration of Module #1. (c) Primary coil and detection coil. (d) Secondary coil. (e) Detection coil. (f) Power board of the primary inverter. (g) Control board of the primary inverter. (h) MCU core board of the primary inverter.
The next step is to downscale the time base. Figure 15b and c is obtained by enlarging the region outlined by the red dashed box. According to the simulation results, the three modules achieved effective synchronization, with a maximum synchronization error of T_mse = 188 ns = 1.6%T_s.
Figure 16 shows the configuration of the experimental setup. In this experiment, a Hioki PW8001 power analyzer and a Keysight DSO-X 3024T oscilloscope are used. Figure 16 illustrates the overall configuration of the prototype system, which is arranged based on SSDS topology as depicted in Fig. 1. The system consists of three switched-mode power supplies, three WPT modules, a centralized rectifier, and a centralized load. The three switched-mode power supplies simulate the output of PV panels and supply power to the three WPT modules. The primary inverters of each module convert the energy from DC to AC, which is then transmitted to the secondary side through the primary compensation network and primary coil. The secondary coils and compensation networks of each module are directly connected in series based on the SSDS topology. The energy transmitted to the secondary side is rectified by a centralized rectifier, providing DC power output at the load side.
Figure 16b illustrates the specific hardware configuration of Module #1. Module #1 consists of a primary inverter, a primary compensation network, a primary coil, a detection coil, a secondary coil, and a secondary compensation network. Figure 16c–e illustrate the specific hardware configurations of the primary coil, secondary coil, and detection coil, respectively. The primary coil and the secondary coil are designed and manufactured using PCB litz wire, while the detection coil is divided into two symmetrical sub-coils (upper-side and bottom-side). These sub-coils are assembled orthogonally with the primary coil through a mortise-and-tenon structure. The coil parameters are consistent with those listed in Table 2, and the air gap between the primary and secondary coils is 50 mm. Figure 16f–h illustrate the specific hardware configurations of the power board, control board, and MCU core board of the primary-side inverter with detailed functional partitions explicitly labeled in the figures.
Table 6 provides the key parameters of the prototype system.
Figure 17 presents the waveforms when the three modules are activated sequentially, where v_in1, v_in2, and v_in3 represent the output voltages of the three inverter modules, and i_o represents the secondary-side current.
Figure 17a presents the waveforms of v_in1, v_in2, v_in3 and i_o when only Module #1 is activated. Figure 17b reduces the oscilloscope time base to display the waveforms at the rising edge of the inverter output voltage in Fig. 17a. Figure 17c shows the waveforms of v_in1, v_in2, v_in3 and i_o when both Module #1 and Module #2 are activated. Figure 17d reduces the oscilloscope time base to display the waveforms at the rising edge of the inverter output voltage in Fig. 17c. According to the waveforms in Fig. 17d, when both Module #1 and Module #2 are activated, the T_mse between Module #1 and Module #2 is approximately 90ns. Figure 17e presents the waveforms of v_in1, v_in2, v_in3 and i_o when all three modules are activated. Figure 17f reduces the oscilloscope time base to display the waveform at the rising edge of the inverter output voltage in Fig. 17e. Based on the waveforms in Fig. 17f, when all three modules are activated, the T_mse between the modules is approximately 178 ns.
Observation of Fig. 17 indicates that the proposed synchronization strategy achieves high-quality synchronization. When three modules operate simultaneously, the T_mse between modules is less than 2% of T_s.
Figure 18 presents the inverter output voltage v_in1, inverter output current i_in1, primary current i_p1, and secondary current i_o of Module #1, when three modules operate simultaneously. Figure 18a presents the fluctuations of v_in1, i_in1, i_p1 and i_o over a longer time span, while Fig. 18b reduces the oscilloscope time base to display the detailed waveforms of v_in1, i_in1, i_p1 and i_o. Due to the inherent synchronization error, which cannot be fully eliminated, i_in1 and i_o exhibit fluctuations. However, the primary current remains nearly unaffected due to its current source characteristics. According to Fig. 18, the absolute fluctuations of i_in1 and i_o are both less than 300 mA, and the relative fluctuation is less than 4%. No significant transient process caused by synchronization is observed.
Figure 19 shows the drain-source voltage v_ds1 of the inverter MOSFET, the inverter output current i_in1, and the inverter drive signals pwm1 and pwm2 of Module #1. To ensure that the primary-side inverter operates under ZVS (zero voltage switching) condition, the inductance of the resonant inductor L_f in the actual system should be set slightly smaller than the inductance at resonance. It is evident that the MOSFET in the inverter operates under ZVS, which further enhances system efficiency.
Waveforms when the three modules are activated sequentially. (a) Only Module #1 is activated. (b) Only Module #1 is activated. (c) Module #1 and Module #2 are activated. (d) Module #1 and Module #2 are activated. (e) Three modules are all activated. (f) Three modules are all activated.
Experimental results of current fluctuations during stable operation of the system. (a) Experimental waveforms. (b) Experimental waveforms (enlarged).
Figure 20 presents a screenshot from the power analyzer when the three modules are operating simultaneously. U_dc1, U_dc2, U_dc3 represent the DC input voltages of the three WPT modules, and I_dc1, I_dc2, I_dc3 represent the DC input currents of the three WPT modules. U_dc4 and I_dc4 correspond to the voltage and current across the load resistor. P₁, P₂, P₃ denote the input power of the three WPT modules, and P₄ represents the output power consumed by the load. η denotes the system efficiency. As indicated in Fig. 20, with a total input power of 864 W, the system efficiency exceeds 85%, with a total power loss of approximately 130 W.
Experimental results of the voltage and current waveforms of the MOSFET. (a) Experimental waveforms. (b) Experimental waveforms (enlarged).
Figure 21 shows the temperature rise of the power coil during full-power operation. Under an ambient temperature of 12 °C, after 30 min of full-power operation, the temperature rise of both the primary and secondary coils is maintained within 20 °C. Thanks to the excellent heat dissipation capability of the PCB material, the power coils perform well in terms of thermal management.
Screenshot of the power analyzer.
The results of coil temperature rise test.
Finally, Fig. 22 illustrates the installation method between the WPT module and the PV panel in a practical application scenario. The primary side of WPT module is mounted on the backside of the PV panel. Owing to its planar design, the WPT module can be easily embedded into the redundant space on the back of the PV panel, avoiding additional volume overhead.
The installation method between the WPT module and the PV panel. (a)Front view of the PV panel. (b)Rear view of the PV panel. (c)Primary side of the WPT module.
This paper proposes a distributed WPT system based on SSDS topology for integration with BAPV systems. Aimed at BAPV application scenarios, a solution that balances cost, efficiency, and flexibility is presented. As a distributed WPT system, the proposed system maintains the flexibility of conventional systems, allowing for easy scaling by adding or reducing modules. The adoption of the SSDS topology eliminates the need for secondary-side rectifiers in each distributed WPT module, thereby reducing both cost and size, while simultaneously increasing the synchronization requirements between modules.
To ensure hardware consistency and synchronization accuracy, while further reducing the volume and weight of the module, this paper adopts a fully planar design approach. The power and detection coils are designed and fabricated using PCB planar coils, with PCB litz wire applied to the power coils to further improve efficiency and reduce loss. The detection coil is precisely assembled with the primary coil through a mortise-and-tenon structure, ensuring decoupling from the magnetic field generated by the primary current. The proposed synchronization strategy, based on detection coils, ensures precise module synchronization and guarantees system stability.
The proposed topology, system, coil design, and synchronization strategy have been validated through both simulations and experiments. Based on the SSDS topology, an 850 W prototype system consisting of three distributed WPT modules has been designed and established. The system achieves soft switching of the switching devices and over 85% system efficiency. The robust and precise synchronization strategy ensures system stability, with a synchronization error of less than 2% of the switching period. As a result, fluctuations in both the primary inverter output current and the secondary current are maintained around 300 mA, and the synchronization process has minimal impact on smooth power transfer.
The datasets used in this article are available from the corresponding author upon reasonable request.
The self-inductance of the primary coil, the secondary coil, the primary resonant inductor and the detection coil
The mutual inductance between the primary coil and the secondary coil, the primary coil and the detection coil, and the secondary coil and the detection coil
The coupling coefficient between the primary coil and the secondary coil, the primary coil and the detection coil, and the secondary coil and the detection coil
The capacitance of the resonant capacitors in the CLC-S compensation network
The capacitance of the load-side filter capacitor
The load resistance and the equivalent resistance of the rectifier
The parasitic resistance of the resonant inductor, the primary coil, the secondary coil and the series-connected line
The input impedance
The output impedance
The primary-side inverter output voltage
The primary-side inverter output voltage of Module #1 ~ #N
The system’s output voltage
The output voltage of Module #1 ~ #N
The induced voltage on the detection coil
The PWM carrier signal
The voltage of the DC source
The phasor forms of v_in, v_o and v_ind
The Thevenin equivalent voltage source
The primary-side inverter output current
The primary-side inverter output current of Module #1 ~ #N
The system’s output current (the secondary current)
The current of the primary coil
The primary coil current of Module #1
The Norton equivalent current source
The phasor forms of i_in, i_o and i_p
The switching frequency and the angular resonant frequency
The number of modules in the system
The total input power of the system
The total output power of the system
The efficiency of the system
the phase difference between V_in and I_in
The phase shift of v_ind caused by the detection error and the output error
The switching period
The period of the PWM carrier signal
The period of the transition interval
The maximum synchronization error
The amplitude gain of v_ind caused by the detection error and the output error
The length and width of the power coil
The number of turns of the power coil
The routing width and the routing clearance of the power coil
The number of layers in the PCB
The number of strands per layer when using the PCB litz wire
The routing width of each strand and each bundle when using the PCB litz wire
The routing clearance between each strand when using the PCB litz wire
The routing angle when using the PCB litz wire
The length and the height of the detection coil
The number of turns of the detection coil
The magnetic fields generated by the primary coil and the secondary coil
Elavarasan, R. M. et al. A comprehensive review on renewable energy development, challenges, and policies of leading Indian States with an international perspective. IEEE Access. 8, 74432–74457. https://doi.org/10.1109/ACCESS.2020.2988011 (2020).
Article  Google Scholar 
Sutikno, T., Arsadiando, W., Wangsupphaphol, A., Yudhana, A. & Facta, M. A review of recent advances on hybrid energy storage system for solar photovoltaics power generation. IEEE Access. 10, 42346–42364. https://doi.org/10.1109/ACCESS.2022.3165798 (2022).
Article  Google Scholar 
Dehghani, M. et al. Control of LPV modeled AC-microgrid based on mixed H2/H ∞ time-varying linear state feedback and robust predictive algorithm. IEEE Access. 10, 3738–3755. https://doi.org/10.1109/ACCESS.2021.3139341 (2022).
Article  Google Scholar 
Kaltenbrunner, M. et al. Flexible high power-per-weight perovskite solar cells with chromium oxide–metal contacts for improved stability in air. Nat. Mater. 14(10), 1032–1039. https://doi.org/10.1038/nmat4388 (2015).
Article  CAS  PubMed  ADS  Google Scholar 
Zhang, C. & Park, N. G. Materials and methods for cost-effective fabrication of perovskite photovoltaic devices. Commun. Mater. 5(1), 1–13. https://doi.org/10.1038/s43246-024-00636-8 (2024).
Article  CAS  Google Scholar 
Ghiasi, M., Wang, Z., Mehrandezh, M. & Paranjape, R. Enhancing efficiency through integration of geothermal and photovoltaic in heating systems of a greenhouse for sustainable agriculture. Sustain. Cities Soc. 118, 106040. https://doi.org/10.1016/j.scs.2024.106040 (2025).
Article  Google Scholar 
Sechilariu, M., Wang, B. & Locment, F. Building integrated photovoltaic system with energy storage and smart grid communication. IEEE Trans. Industr. Electron. 60(4), 1607–1618. https://doi.org/10.1109/TIE.2012.2222852 (2013).
Article  Google Scholar 
Liu, X., Liu, X., Jiang, Y., Zhang, T. & Hao, B. Photovoltaics and energy storage integrated flexible direct current distribution systems of buildings: definition, technology review, and application. CSEE J. Power Energy Syst. 9(3), 829–845. https://doi.org/10.17775/CSEEJPES.2022.04850 (2023).
Article  Google Scholar 
Svetozarevic, B. et al. Dynamic photovoltaic building envelopes for adaptive energy and comfort management. Nat. Energy. 4(8), 671–682. https://doi.org/10.1038/s41560-019-0424-0 (2019).
Article  Google Scholar 
Fathollahi, A., Derakhshandeh, S. Y., Ghiasian, A. & Khooban, M. H. Utilization of dynamic wireless power transfer technology in multi-depot, multi-product delivery supply chain. Sustain. Energy Grids Netw. 32, 100836. https://doi.org/10.1016/j.segan.2022.100836 (2022).
Article  Google Scholar 
Fathollahi, A., Gheisarnejad, M., Boudjadar, J., Homayounzadeh, M. & Khooban, M. H. Optimal design of wireless charging electric buses-based machine learning: a case study of nguyen-dupuis network. IEEE Trans. Veh. Technol. 72(7), 8449–8458. https://doi.org/10.1109/TVT.2023.3247838 (2023).
Article  Google Scholar 
Wang, H., Sun, J. & Cheng, K. W. E. A compact and integrated magnetic coupler design with cross-coupling elimination utilizing LCC-S compensation network for Building attached photovoltaic systems. IEEE Trans. Magn. 59(11), 1–5. https://doi.org/10.1109/TMAG.2023.3278073 (2023).
Article  Google Scholar 
Minnaert, B., Ravyts, S., Driesen, J. & Stevens, N. Challenges for wireless power transfer in building-integrated photovoltaics. In 2018 IEEE PELS Workshop on Emerging Technologies: Wireless Power Transfer (Wow) 1–5 (2018). https://doi.org/10.1109/WoW.2018.8450923.
Anlan, C., Xuming, S. & Xiangjun, Q. Hardware design of micro PV—battery system for underwater wireless power supply. In IEEE 6th International Electrical and Energy Conference (CIEEC) 3928–3932 (2023). https://doi.org/10.1109/CIEEC58067.2023.10167299.
Agusto, L., Muñoz, J., Villalón, A., Aliaga, R. & Guzmán, J. Wireless power transfer system for an embedded energy-storage system in a PV microinverter. In IEEE International Conference on Industrial Technology (ICIT) 1223–1228 (2020). https://doi.org/10.1109/ICIT45562.2020.9067104.
Ji, B. et al. MPPT control for pv based wireless power transfer system in lunar rover by secondary side converter. In 2019 IEEE PELS Workshop on Emerging Technologies: Wireless Power Transfer (WoW) 105–110 (2019). https://doi.org/10.1109/WoW45936.2019.9030675.
Elwalaty, M., Jemli, M. & Azza, H. B. A two-rectangular coils wireless charging electric vehicle with photovoltaic generator. In 19th International Conference on Sciences and Techniques of Automatic Control and Computer Engineering (STA) 455–460 (2019). https://doi.org/10.1109/STA.2019.8717272.
Chen, H., Geng, Y., Shen, Q., Li, J. & Lu, Q. Collaborative control strategy design of photovoltaic energy storage and DC microgrid for electric vehicles using wireless power transfer. In IEEE 3rd International Conference on Industrial Electronics for Sustainable Energy Systems (IESES) 1–6 (2023). https://doi.org/10.1109/IESES53571.2023.10253740.
Arulvendhan, K., Kandadai Nagaratnam, S., Narayanamoorthi, R., Alharbi, M. & Hussen, S. Hybrid compensation based efficient wireless charging system design with solar photovoltaic interface toward sustainable transportation. IEEE Access. 12, 87152–87166. https://doi.org/10.1109/ACCESS.2024.3414169 (2024).
Article  Google Scholar 
Zang, S., Yuan, C. K., James, C. & Hu, A. P. Modular-based PV system with contactless capacitive power transfer interface. In 2021 IEEE PELS Workshop on Emerging Technologies: Wireless Power Transfer (WoW) 1–5 (2021). https://doi.org/10.1109/WoW51332.2021.9462868.
Zheng, Y. et al. Modular wireless power transmission for photovoltaic subpanel system. In 2021 IEEE Energy Conversion Congress and Exposition (ECCE) 546–553 (2021). https://doi.org/10.1109/ECCE47101.2021.9595115.
Chittoor, P. K. & Bharatiraja, C. Building integrated photovoltaic powered wireless drone charging system. Sol. Energy. 252, 163–175. https://doi.org/10.1016/j.solener.2023.01.056 (2023).
Article  ADS  Google Scholar 
Wang, W. et al. Indoor organic photovoltaic module with 30.6% efficiency for efficient wireless power transfer. Nano Energy. 128, 109893. https://doi.org/10.1016/j.nanoen.2024.109893 (2024).
Article  CAS  Google Scholar 
Lope, I., Carretero, C., Acero, J., Alonso, R. & Burdio, J. M. Frequency-dependent resistance of planar coils in printed circuit board with Litz structure. IEEE Trans. Magn., 50(12), 1–9. https://doi.org/10.1109/TMAG.2014.2337836 (2014).
Li, Z. et al. Design and optimization with litz wire version of PCB in solid-state transformer. In IEEE Applied Power Electronics Conference and Exposition (APEC), Long Beach, CA, USA: IEEE 1453–1459 (2024). https://doi.org/10.1109/APEC48139.2024.10509347.
Serrano, J., Lope, I., Acero, J., Carretero, C. & Burdio, J. M. Mathematical description of PCB-adapted litz wire geometry for automated layout generation of WPT coils. In IECON 2017–43rd Annual Conference of the IEEE Industrial Electronics Society, Beijing: IEEE 6955–6960. (2017). https://doi.org/10.1109/IECON.2017.8217216.
Li, Z. et al. Oct., A transformer design with PCB Litz wire concept for solid state transformer. In 2023 IEEE Energy Conversion Congress and Exposition (ECCE), Nashville, TN, USA: IEEE 848–854 (2023).https://doi.org/10.1109/ECCE53617.2023.10362376.
Lope, I., Acero, J. & Carretero, C. Analysis and optimization of the efficiency of induction heating applications with litz-wire planar and solenoidal coils. IEEE Trans. Power Electron. 31(7), 5089–5101. https://doi.org/10.1109/TPEL.2015.2478075 (2016).
Article  ADS  Google Scholar 
Rehlaender, P. et al. A PCB integrated winding using a litz structure for a wireless charging coil. In 21st European Conference on Power Electronics and Applications (EPE ’19 ECCE Europe), Genova, Italy P.1-P.9 (IEEE, 2019). https://doi.org/10.23919/EPE.2019.8914900.
Li, Y. et al. Analysis, design, and experimental verification of a mixed high-order compensations-based WPT system with constant current outputs for driving multistring leds. IEEE Trans. Industr. Electron. 67(1), 203–213. https://doi.org/10.1109/TIE.2019.2896255 (2020).
Article  ADS  Google Scholar 
Download references
The authors would like to acknowledges funding support from National Natural Science Foundation of China (52350003) and 2022 Shunde District Core Technology Breakthrough Project (2230218004234).
College of Electrical Engineering, Zhejiang University, Hangzhou, China
Zhecheng Zhang, Hao Chen, Wanying Weng, Yuanpeng Chen, Jiande Wu & Xiangning He
Search author on:PubMed Google Scholar
Search author on:PubMed Google Scholar
Search author on:PubMed Google Scholar
Search author on:PubMed Google Scholar
Search author on:PubMed Google Scholar
Search author on:PubMed Google Scholar
Z.Z. proposed the concept and completed the hardware and software design, simulation analysis, experimental testing, and writing of the main manuscript text. H.C. assisted in the experimental testing, reviewed the manuscript, and participated in drawing Figs. 1, 2, 3 and 4. W.W. assisted in the simulation analysis, participated in drawing Figs. 6, 7, 8, 9 and 10, and reviewed the manuscript. Y.C. assisted in the background research of the study and participated in simulation modeling. J.W. proposed the concept, provided guidance for the hardware and software design, and offered extensive revision suggestions. X.H. provided guidance for the hardware and software design and reviewed the manuscript.
Correspondence to Jiande Wu.
The authors declare no competing interests.
Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.
Open Access This article is licensed under a Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License, which permits any non-commercial use, sharing, distribution and reproduction in any medium or format, as long as you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons licence, and indicate if you modified the licensed material. You do not have permission under this licence to share adapted material derived from this article or parts of it. The images or other third party material in this article are included in the article’s Creative Commons licence, unless indicated otherwise in a credit line to the material. If material is not included in the article’s Creative Commons licence and your intended use is not permitted by statutory regulation or exceeds the permitted use, you will need to obtain permission directly from the copyright holder. To view a copy of this licence, visit http://creativecommons.org/licenses/by-nc-nd/4.0/.
Reprints and permissions
Zhang, Z., Chen, H., Weng, W. et al. Distributed wireless power transfer based on secondary-side-direct-series topology for integration with building-attached photovoltaic system. Sci Rep 15, 16926 (2025). https://doi.org/10.1038/s41598-025-97709-6
Download citation
Received: 27 December 2024
Accepted: 07 April 2025
Published: 15 May 2025
Version of record: 15 May 2025
DOI: https://doi.org/10.1038/s41598-025-97709-6
Anyone you share the following link with will be able to read this content:
Sorry, a shareable link is not currently available for this article.

Provided by the Springer Nature SharedIt content-sharing initiative
Advertisement
Scientific Reports (Sci Rep)
ISSN 2045-2322 (online)
© 2025 Springer Nature Limited
Sign up for the Nature Briefing newsletter — what matters in science, free to your inbox daily.

source